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    3D FPGA versus multiple FPGA system : enhanced parallelism in smaller area

    Nunna, K.C.; Madipour, Farhad; Murakami, K.J.

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    auspdc2014_submission_3.pdf (537.9Kb)
    Date
    2014-01
    Citation:
    Nunna, K C., Mehdipour, F., & Murakami, K. (2014, January). 3D FPGA versus multiple FPGA system: enhanced parallelism in smaller area. ACM (Ed.), AusPDC '14 Proceedings of the Twelfth Australasian Symposium on Parallel and Distributed Computing 152: 37-43.
    Permanent link to Research Bank record:
    https://hdl.handle.net/10652/3817
    Abstract
    Handling large amounts of data is being limited by bandwidth constraint between processors components and their memory counterparts. Three-dimensional integration (3D) is providing possible solution to handle such critical applications. Especially for running larger designs when implementing on multi-FPGA platform, which can produce huge amount of fine-grain parallelism, for satisfying the speed and reliability needs 3D FPGA can be considered as a close candidate to choose. In this paper we tried to show the benefits of running larger designs on 3D FPGA compared to running on multi-FPGA systems using benchmark simulation. Results showed that a TSV-based 3D FPGA achieved better performance and area results.
    Keywords:
    3D FPGA, Through-Silicon Vias (TSVs), Multi-FPGA System, parallel computing
    ANZSRC Field of Research:
    090604 Microelectronics and Integrated Circuits
    Copyright Holder:
    Authors
    Rights:
    This digital work is protected by copyright. It may be consulted by you, provided you comply with the provisions of the Act and the following conditions of use: Any use you make of these documents or images must be for research or private study purposes only, and you may not make them available to any other person. You will recognise the author's and publishers rights and give due acknowledgement where appropriate.
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    • Computing Conference Papers [147]

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