Fast Center Search Algorithm with Hardware implementation for Motion Estimation in HEVC Encoder
Medhat, Ahmed; Shalaby, Ahmed; Sayed, Mohammed S.; Elsabrouty, Maha; Madipour, Farhad
Citation:Medhat, A., Shalaby, A., Sayed, M. S., Elsabrouty, M. , Mehdipour, F. (2014, December). Fast Center Search Algorithm with Hardware implementation for Motion Estimation in HEVC Encoder. IEEE Xplore (Ed.), 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) (pp.155-158). 10.1109/ICECS.2014.7049945.
Permanent link to Research Bank record:https://hdl.handle.net/10652/3814
This paper presents a Fast Center Search Algorithm (FCSA) and its hardware implementation design of integer Motion Estimation for High Efficiency Video Coding (HEVC). FCSA achieves average time saving ratio up to 40% for HD video sequences with respect to full search, with insignificant loss in terms of PSNR performance and bit rate. The proposed hardware implementation shows that it meets the requirements of 30 4K frame per second with ±16 search window at 550 MHz. The prototyped architecture utilizes 8% of the LUTs and 4% of the slice registers in Xilinx Virtex-6 XC6VLX-550T FPGA