A reconfigurable data-path accelerator based on single-flux quantum circuits

Kataoka, H.; Honda, H.; Madipour, Farhad; Yoshikawa, N.; Fujimaki, A.; Akaike, H.; Takagi, N.; Murakami, K.J.

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Date
2014-03
Citation:
Kataoka, H., Honda, H., Mehdipour, F., Yoshikawa, N., Fujimaki, A., Akaike, H., Takagi, N., & Murakami, K. (2014). A Reconfigurable Data-Path Accelerator Based on Single-Flux Quantum Circuits. IEICE TRANSACTIONS on Electronics, Vol.E97-C No.3, pp.141-148.
Permanent link to Research Bank record:
https://hdl.handle.net/10652/3756
Abstract
The single-flux quantum (SFQ) is expected to be a next-generation high-speed and low-power technology in the field of logic-circuits. CMOS as the dominant technology for conventional processors cannot be replaced with SFQ technology due to the difficulty of implementing feed-back loops and conditional branches using SFQ circuits. This paper investigates the applicability of a reconfigurable data-path (RDP) accelerator based on SFW circuits. The authors introduced detailed specifications of the SFQ-RDP architecture and compare its performance and power/performance ratio with a graphics processing unit (GPU). The results show at most 1600 times greater efficiency in terms of Flops/W (floating-point operations per second /Watt) for some high-performance computing application programs
Keywords:
single flux quantum (SFQ), reconfigurable data path (RDP), accelerator
ANZSRC Field of Research:
090604 Microelectronics and Integrated Circuits
Copyright Holder:
Institute of Electrical and Electronics Engineers (IEEE
Copyright Notice:
Copyright © Institute of Electrical and Electronics Engineers (IEEE)
Available Online at:
https://www.jstage.jst.go.jp/article/transele/E97.C/3/E97.C_141/_article
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