Browsing Construction + Engineering Conference Papers by Subject "Network-on-Chip (NoC)"
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A design methodology for performance maintenance of 3D Network-on-Chip with multiplexed Through-Silicon Vias (ACM DL (Digital Library), 2015-06)3D integration is an emerging technology that overcomes 2D integration process limitations. The use of short Through-Silicon Vias (TSVs) introduces a significant reduction in routing area, power consumption, and delay. ...